yes. and as described above, the spec is really quite clever. it assumes the worst case: that not only do two masters start at precisely the same instant, but they send data that is bit-for-bit identical, up to some bit. as soon as the data differs on one bit, or the devices drift out of sync, then the device sending 0 (or the slower device) wins arbitration.
the problem is the gulf between the spec and the real world. b/c of the open-drawin requirement, the unspecified bus termination circuit, potentially long cable runs, &c, i2c clock and data edges are never very sharp. plus, many devices are designed to use either 5v or 3.3v high values. it all adds up to this:
(with variations) being a very, very common scenario.
this general business of “randonly retrying” is hard to get right and has no deterministic guarantees of actually working for every scenario. so engineers are correctly skeptical of such approaches. you could keep “retrying” foerver and if you’re unlucky then your device is stalled.
anyways, i think this is where we’re at so far, please correct me:
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avr32 fully supports multi-leader arbitration in silicon. but the ASF driver doesn’t support it out of the box, AFAICT.
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i’m assuming teensy parts also fully support it in silicon, because they are NXP parts and NXP owns i2c! but the i2c_t3 library definitely won’t work with multiple leaders out of the box, and i’m going to go out on a limb and guess that it’s not a simple matter of changing some #defines.
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sounds like the STM situation is similar. i think most of these libraries just punt on this feature because it’s rarely used, has a lot of failure modes, and is very sensitive to circuit design decisions. (in other words, it’s a tech support nightmare for library providers.)
btw, it looks like ChibiOS has particularly full-fledged support for these features. might be worth taking a look…