I notice in the hardware specs you mention audio, ultrasonic, and differential I/O; I’m guessing of these only the differential channels are DC-coupled? As a CV source/processor I think this kind of thing seems really amazing, though definitely as a synthesizer as well. Having a Python interface for all this is awesome, though I wonder if you can comment on what if any “bare metal” programming interfaces are available/planned? Am I reading too much into the ConfigurationByteStream message type by guessing you can bang a raw reconfiguration packet at the FPAA over this gRPC interface? Because that sounds rad.
A key part of the appeal for me is definitely that you can reconfigure the circuit at runtime. Not all FPAAs support this, but it looks like the AN231E04 does, and I assume this functionality is how ZRNA works. This suggests all sorts of interesting possibilities that I haven’t the slightest clue of the feasibility of: self-restructuring generative sequencers, structure-variable filters, … which are of course all things you can do in software (or field-programmable digital hardware), but software is like, kind of a different medium?
I love FP*As and I’ve wanted an excuse to get a dev board for one of these chips for years just to fart around with it. I feel like despite making it through numerous electronics classes I never got any kind of intuition for Ye Analogue once nonlinear elements were involved. Breadboarding stuff in my free time always seemed like such a pain, and I feel like I’d gotten so used to the safety of software that blue smoke rites of passage seemed unappealing. Also now that I think of it, maybe some level of angst about whether integrated circuits feel pain? I guess probably I was supposed to figure out what the hell I was doing with EDA tools. What I think I’m saying is electrical engineering pedagogy could benefit a lot from modular synthesizers. Anyway, that’s a definite appeal of such a device for me, is having a sandbox where I can stumble around with software-defined circuits without worrying as much about, um, hurting it.
I am thrilled to be able to say that I have this device, it is extraordinary. Besides the fact that it means the old TV in my studio picks up The Acid Channel, I am incredibly excited about the platform. You have 5 inputs and 4 outputs, in minijack, that will do DC to >10 MHz! That device is theoretically capable of stimulating, like, a respectable fraction of my entire sensory input surface. LZX has said they’ve considered open-sourcing the firmware, but the VHDL would remain fixed. It’s possible this is also Intellijel’s position on Rainmaker, not sure. Which I get I guess, that stuff represents a lot of NRE costs, but as an on-again-off-again wannabe-pro digital hardware hacker it’s disappointing. FPGAs are exciting to me intrinsically, maybe even more so than things they can do, because massively parallel thinking is exciting, and dynamic reconfiguration (the body of the machine rearranging itself??) is really exciting.
For a while now they’ve been doing this on the same die with the gate array, this is the case with the Zynq system-on-chips used by the Memory Palace, but not the Cyclone series used on the Rainmaker’s DE0 board. SoCs like Zynq will usually also include some peripherals like gigabit transcievers (for ethernet, PCIe, …).
I believe LabView is able to do this if you also buy their (pricey) FPGA board, but I really personally can’t stand LabView and that stuff is in a pretty unattainable price range to (most, I suppose) bedroom hackers. It looks like Anadigm (the company that made this FPAA) also has some drag-and-drop functionality in their design tools. Not sure what their licensing costs or whatever are like either. I also am not sure what kind of other programming options are available for this part in particular, but high-level synthesis has been a really cool active research area for some time. Lots of these approaches try to use C (or MATLAB? eesh), that is probably more practical but perhaps less Neato than research like embedding a hardware description language in Haskell with the intent of compiling declarative high level circuit/DSP descriptions to register-transfer logic.